1. Field of the Invention
Embodiments of the present invention relate to a semiconductor package including a plurality of stacked semiconductor die, and methods of forming the semiconductor package.
2. Description of the Related Art
The strong growth in demand for portable consumer electronics is driving the need for high-capacity storage devices. Non-volatile semiconductor memory devices, such as flash memory storage cards, are becoming widely used to meet the ever-growing demands on digital information storage and exchange. Their portability, versatility and rugged design, along with their high reliability and large capacity, have made such memory devices ideal for use in a wide variety of electronic devices, including for example digital cameras, digital music players, video game consoles, PDAs and cellular telephones.
While many varied packaging configurations are known, flash memory storage cards may in general be fabricated as system-in-a-package (SiP) or multichip modules (MCM), where a plurality of die are mounted and interconnected on a small footprint substrate. The substrate may in general include a rigid, dielectric base having a conductive layer etched on one or both sides. Electrical connections are formed between the die and the conductive layer(s), and the conductive layer(s) provide an electric lead structure for connection of the die to a host device. Once electrical connections between the die and substrate are made, the assembly is then typically encased in a molding compound which provides a protective package.
A cross-sectional side view and a top view of a conventional semiconductor package 20 are shown in FIGS. 1 and 2 (without molding compound in FIG. 2). Typical packages include a plurality of semiconductor die, such as flash memory die 22 and controller die 24, affixed to a substrate 26. A plurality of die bond pads 28 may be formed on the semiconductor die 22, 24 during the die fabrication process. Similarly, a plurality of contact pads 30 may be formed on the substrate 26. Die 22 may be affixed to the substrate 26, and then die 24 may be mounted on die 22. All die may then be electrically coupled to the substrate by affixing wire bonds 32 between respective die bond pad 28 and contact pad 30 pairs. Once all electrical connections are made, the die and wire bonds may be encapsulated in a molding compound 34 to seal the package and protect the die and wire bonds.
In order to most efficiently use package footprint, it is known to stack semiconductor die on top of each other, either completely overlapping each other, or with an offset as shown in FIGS. 1 and 2. In an offset configuration, a die is stacked on top of another die so that the bond pads of the lower die are left exposed. An offset configuration provides an advantage of convenient access of the bond pads on each of the semiconductor die in the stack.
In packages including a plurality of stacked semiconductor die, space within the semiconductor package for wirebonding is at a premium. In particular, where there are multiple stacked flash memory die 22, it may become difficult to find space on the substrate for all of the contact pads required to make all of the necessary electrical connections. The number of die bond pads, contact pads and wire bonds in an actual semiconductor package would be many more than is shown in FIGS. 1 and 2. The number shown in FIGS. 1 and 2 is greatly reduced for the sake of clarity. Moreover, FIGS. 1 and 2 include only a pair of memory die 22. There may be more than that in the die stack, making it even harder to find room for all of the required wire bonds.
The controller die 24 is generally smaller than the memory die 22. Accordingly, the controller die 24 is conventionally placed at the top of the memory die stack. However, where there is a plurality of stacked memory die, it is often difficult to find space on the substrate for all of the required controller die wire bonds. In FIGS. 1 and 2, the memory die 22 all bond out to a single, side edge of the substrate, and the controller die wire bonds 28a are shown bonded to a separate row of contact pads 30 along that edge. However, in certain configurations, there may not be room on the substrate for adding a separate row of contact pads. Moreover, in FIGS. 1 and 2, a second row of die bonds pads 28b along an adjacent edge of the controller die 24 are shown wire bonded to a top edge of the substrate. However, in certain configurations, the memory die take up all or substantially all of the width of the substrate, and there is no room for wire bonding the controller die along the top edge of the substrate.
One conventional method of handling this problem is by including a redistribution layer within the controller die to effectively reposition the controller die bond pads to locations along the die stack having greater access to available contact pad spaces on the substrate. However, given the small size of the controller die, this is not always a feasible solution. Moreover, fabrication of a redistribution layer adds time, cost and complexity to the fabrication of the controller die.